Machine Cycles of 8085 microprocessor

1. Op-code fetch cycle

• The MP uses this cycle to take the op-code of an instruction from the memory location to processor.
• The op-code is taken from memory and transferred to instruction register for decoding and execution.
• The time required to complete this cycle is 4 to 6 T-states.

2. Memory read cycle

• The MP executes these cycles to read data from memory.
• The address of memory location is given by instruction.
• The time required to complete the memory read cycle is 3 T-states.

3. Memory write cycle

• The MP executes these cycles to write data to memory.
• The address of memory is given by instructions.
• The time required to complete the memory write cycle is 3 T-states.

4. I/O read cycle

• The MP executes these cycles to read data from I/O devices.
• The address of I/O port is given by instruction.
• The time required to complete the I/O read cycle is 3 T-states.

5. I/O write cycle

• The MP executes these cycles to write data into I/O devices.
• The address of I/O port is given by instruction.
• The time required to complete the I/O write cycle is 3 T-states.

6. Interrupt acknowledge cycle

• In the response to interrupt request input INTR, the MP executes these cycles to get information from the interrupting devices.
• The time required to complete this cycle is 3 T-states.