Microprocessor Viva Questions

Introduction to Microprocessor and Microcomputers
1. Define microprocessor.
2. Write application of microcontroller.
3. List the basic components of microcomputer.
4. What are the purposes of control unit in Microprocessor?
5. Mention one advantage and one disadvantage of Harvard architecture over von Neumann machine.
6. What is store programmed concept.
8086/8088 Architecture and Instruction Set
1. How many address and data bus are available in 8088 microprocessor?
2. How many minimum address lines are required to access 512 KB?
3. Explain in brief about how microprocessor works.
4. What is segment register in 8086? Explain its function.
5. With an example, explain the Register Indirect Addressing Mode.
6. Write an instruction for the direct addressing mode.
7. Identify the addressing mode of source operand in MOV AL, 23H. Give reason.
8. What happens when MUL BX instruction is executed?
9. What is the total memory capacity of the system with 20 address lines?
10. What is the result of MUL AL? Initial value of AL = 03H.
11. What happens when DIV BL executed.
12. What happens when DIV BX executed.
13. How many byte instruction is MOV AX,2304H?
14. How many byte instruction is MOV AL,23H?
15. Flag Register




OF
DF
IF
TF
SF
ZF

AF

PF

CF
16. BIU, EU, CS, DS, ES, SS, IP, AX, BX, CX, DX, SP, BP, SI, DI
17. What is opcode and operand?
18. Differentiate mov ax,2304h and mov ax,[2304h].
19. Differentiate mov ax,bx and mov ax,[bx].

Microprocessor Viva Questions

1. What are the purposes of control unit in Microprocessor?
2. Write application of microcontroller.
3. What do you mean by Interrupt vector table?
4. Write an instruction for the direct addressing mode.
5. What is the role of linker in assembly language programming?
6. Which signal is used to select Memory or I/O?
7. What are the purposes of S2, S1, S0?
8. Describe the function of 8282.
9. What are the roles of 8251 in computers?
10. How many address and data bus are available in 8088 microprocessor?
11. Explain in brief about how microprocessor works.
12. Mention one advantage and one disadvantage of Harvard architecture over von Neumann machine.
13. What is the function of a segment register in 8086?
14. What happens when the instruction TEST AL, BL is executed?
15. With an example, explain the Register Indirect Addressing Mode.
16. What is the purpose of a linker during assembly language program development?
17. What function does INT 21H perform when 0AH is loaded into AH register?
18. What is the function of the ALE signal in 8086?
19. Define maskable interrupt with an example.
20. What is the function of T pin in 8288 bus controller?

Final Year Project Report

It's the final year project report in 8th semester "Wireless Weather Monitoring System" using Arduino.





8085 Program - Transferring block of data with "Condition"

Q. There are two tables of data stored at 40A1H and 40B1H having 10 data each. Write a program to store the data in the first table to third table starting from address 40C1H if the corresponding data in the first table is greater than the second and table else store FF in the third table.
Program:

LXI B,40A1H                        ;assume A1 as the starting number
LXI H,40B1H
LXI D,40C1H
START: LDAX B
CMP M
JC NEXT
STAX D
INX B
INX H
INX D
MOV A,C
CPI ABH                    ;comparing for 10 values (A1-AA)
JNZ START
JMP LAST
NEXT: MVI A,FFH
STAX D
INX B
INX H
INX D
MOV A,C
CPI ABH
JNZ START
LAST: HLT

Address Decoding Example

Q. Design an interfacing circuit to interface a RAM of 256 bytes whose starting address is 5600H.
Ans:

Address Decoding Example

Q. Design an address decoding circuit to interface an input device with eight input switches and a LED output device at 41H and 42H respectively.
Ans:

Address Decoding Example

Q. Design an address decoding circuit for two R/W memory chips each of 8 KB at C000H address consecutively.
Ans:


Address Decoding Example

Q. How four 64 KB RAMs can be interfaced with 8086 MP using decoder?
Ans:

Address Decoding Example

Q. A 128 KB RAM is composed of four 32 KB RAMs. How are all four RAMs interfaced using decoder?
Ans:

8085 Program - Transferring a block of DATA

Q. A table having starting address 2060h contains ten numbers of 8-bit data. Write a program in 8085 microprocessor that transfers the data to next table having starting address 2070h if the data is greater than 50h else store it to next table at 2080h.
Program:

LXI B,2060h
LXI H,2070h
LXI D,2080h
START: LDAX B
CPI 50H
JC NEXT
MOV M,A
INX B
INX H
MOV A,C
CPI 0Ah
JNZ START
JMP LAST
NEXT: STAX D
INX B
INX D
MOV A,C
CPI 0Ah
JNZ START
LAST: HLT

8085 Program - Exchanging Data

Q. Write an assembly language program to exchange the content of memory locations 5000H and 8000H with a labeled Address and opcode. Also stepwise show the result.

Program:

Address
Mnemonics
Operand
Hex Code
Remarks
2000H
LXI H,
5000H
Hex code of LXI H

2001H


00
HL=5000H
2002H


50
M=[HL]=[5000H]
2003H
LXI D,
8000H
Hex code of LXI D

2004H


00

2005H


80
DL=8000H
2006H
LDAX D

Hex code of LDAX D
A=[DL]=[8000H]
2007H
MOV B,A

Hex code of MOV B,A
B=A
2008H
MOV A,M

Hex code of MOV A,M
A=M
2009H
STAX D

Hex code of STAX D
[8000H]=M
200AH
MOV M,B

Hex code of MOV M,B
M=[8000H]
200BH
HLT

76
Stop

Display each character next line in Reverse Order

.model small

.stack 100h

.data
str db "DEEPRAJ$"

.code
start:
    mov ax,@data
    mov ds,ax
    mov cx,0
    lea si,str
l2: cmp [si],'$'
    je l1
    inc cx
    inc si
    jmp l2
l1: dec si
    mov dl,[si]
    mov ah,2
    int 21h
    mov dl,10
    mov ah,2
    int 21h
    loop l1
    mov ah,4ch
    int 21h
end start
end

OUTPUT

How do you interface 8085 microprocessor?

Interfacing 8085 means the way to properly connect the microprocessor with the outside unit i.e. I/O unit and the inside unit i.e. Memory unit. So, there are two types of interfacing: I/O interfacing and Memory interfacing.

I/O interfacing means how to connect MP to the peripheral devices e.g. 8255A, 8251A etc.

Memory interfacing means how to connect MP to the memory devices e.g. RAM, ROM, EPROM etc.

For the interfacing, the remaining address pins must be decoded using the technique called "Address Decoding". This technique uses following decoders to decode:

i) Logic Gate Decoder (Simple NAND Gate decoder)
ii) Line Decoder
      - The 1-to-2 line decoder
      - The dual 2-to-4 line decoder
      - The 3-to-8 line decoder

8085 microprocessor has 16-bit address i.e. it uses 16 pins for address bus. Suppose, we have to interface with 4 KB RAM. This RAM has 12-bit address bus (2^12=4*1024 bytes). Lower 12-bits (A0-A11) of MP gets directly coonected to address pins of RAM. But, what about other upper 4-bits  (A12-A15) address of MP. These pins are the things needed to be decoded by using above decoders. 



Fig; memory interfacing using NAND gate decoder




Fig; memory interfacing using 3*8 decoder


Computer Graphics (CG) Notes - B.Sc. CSIT

Memory Mapped I/O vs I/O Mapped I/O

Memory Mapped I/O
•It considers them like any other memory location.
–They are assigned a 16-bit address within the address range of the 8085.
–The exchange of data with these devices follows the transfer of data with memory. The user uses the same instructions used for memory.

I/O Mapped I/O
•It treats them separately from memory. 
–I/O devices are assigned a “port number” within the 8-bit address range of 00H to FFH. 
–The user in this case would access these devices using the IN and OUT instructions only.

Memory Mapped IO
IO Mapped IO
IO is treated as memory.
IO is treated IO.
16-bit addressing.
8-bit addressing.
More Decoder Hardware.
Less Decoder Hardware.
Can address 216=64k locations.
Can address 28=256 locations.
Less memory is available.
Whole memory address space is available.
Memory Instructions are used.
Special Instructions are used like IN, OUT.
Memory control signals are used.
Special control signals are used.
Arithmetic and logic operations can be performed on data.
Arithmetic and logic operations cannot be performed on data.
Data transfer between register and I/O.
Data transfer between accumulator and I/O.

Address Decoding

Consider that we have a microprocessor interfaced to both I/O device and also a memory chip. Now how to select between the two devices according to the requirement?

For this purpose an address decoding circuit is used. An address decoding circuit aids in selecting the required I/O device or a memory chip.

Let us discuss the concept of Memory interfacing and I/O interfacing here:

The processor communicates with all the parts interconnected in the system through a common address and data bus. As a result of this, only one device can transmit data at a time and others can only receive that data. If more than one device attempt to send data through the bus at the same time, the proper communication among the devices does not become possible because the data sent by them gets garbled. To avoid this situation, ensuring that the proper device gets addressed at proper time, the technique called "address decoding" is used. Generally, there are two common methods for mapping address of these devices. They are:

I/O Mapped I/O
It can address 2^8=256 bytes if mapped in I/O mode. They are used to read 8-bit data from or write 8-bit data to selected device. In this, the I/O device is addressed with 8-bit address.

Memory Mapped I/O
In this mode, the I/O devices are addressed with 16-bit address. The total addressing capability of the processor 8085 in this mode is 2^16 = 65536 bytes = 64 KB.

In both modes described above, depending on the addresses that are allocated to the device, the address decoding are categorized in the following two groups:

Unique Address Decoding
If all of the address lines available on that mapping mode are used for address decoding, then that decoding is called unique address decoding.

Non-unique Address Decoding
If all of the address lines available on that mapping mode are not used for address decoding, then that decoding is called unique address decoding.

Communication Interface

There are two ways in which a microprocessor can connect with outside world or other memory systems.

Serial Communication Interface:
In serial communication interface, the interface gets a single byte of data from the microprocessor and sends it bit by bit to other system serially (or) the interface receives data bit by bit serially from the external systems and converts the data into a single byte and transfers it to the microprocessor.

Parallel Communication Interface:
This interface gets a byte of data from microprocessor and sends it bit by bit to the other systems in simultaneous (or) parallel fashion. The interface also receives data bit by bit simultaneously from the external system and converts the data into a single byte and transfers it to microprocessor.

Programmable Peripheral Devices

Programmable peripheral devices were introduced by Intel to increase the overall performance of the system. These devices along with I/O functions, they perform various other functions such as time delays, counters and interrupt handling. These devices are nothing but a combination of many devices on a single chip. A programmable device can be set up to perform specific function by writing a code in the internal register. As this code controls the function of the device it’s called control word and internal register in which it is stored is called Control Register.

INTEL developed some peripheral devices for processors like 8085/8086/8088. The peripheral devices includes

8255 – Parallel Communication Interface (PPI)

8251 – Serial communication Interface (USART- Universal Synchronous/Asynchronous Receiver/Transmitter)

8257 – DMA Controller

8279 – Keyboard/Display Controller

8259 – Programmable Interrupt controller

8254 – Programmable Timer

How To Interface The 8085 Microprocessor?

We know that a microprocessor is the CPU of a computer. A microprocessor can perform some operation on a data and give the output. But to perform the operation we need an input to enter the data and an output to display the results of the operation. So we are using a keyboard and monitor as Input and output along with the processor. Microprocessors engineering involves a lot of other concepts and we also interface memory elements like ROM, EPROM to access the memory.

Interfacing Types
There are two types of interfacing in context of the 8085 processor.
Memory Interfacing.
I/O Interfacing.

Memory Interfacing:
While executing an instruction, there is a necessity for the microprocessor to access memory frequently for reading various instruction codes and data stored in the memory. The interfacing circuit aids in accessing the memory.

Memory requires some signals to read from and write to registers. Similarly the microprocessor transmits some signals for reading or writing a data.

But what is the purpose of interfacing circuit here?

The interfacing process involves matching the memory requirements with the microprocessor signals. The interfacing circuit therefore should be designed in such a way that it matches the memory signal requirements with the signals of the microprocessor. For example for carrying out a READ process, the microprocessor should initiate a read signal which the memory requires to read a data. In simple words, the primary function of a memory interfacing circuit is to aid the microprocessor in reading and writing a data to the given register of a memory chip.

I/O Interfacing:
We know that keyboard and Displays are used as communication channel with outside world. So it is necessary that we interface keyboard and displays with the microprocessor. This is called I/O interfacing. In this type of interfacing we use latches and buffers for interfacing the keyboards and displays with the microprocessor.

But the main disadvantage with this interfacing is that the microprocessor can perform only one function. It functions as an input device if it is connected to buffer and as an output device if it is connected to latch. Thus, the capability is very limited in this type of interfacing.

Routing Protocols

Routing Information Protocol (RIP)
RIP (Routing Information Protocol) is a widely-used protocol for managing router information within a self-contained network such as a corporate local area network (LAN) or an interconnected group of such LANs. RIP is classified by the Internet Engineering Task Force (IETF) as one of several internal gateway protocols (Interior Gateway Protocol).

Using RIP, a gateway host (with a router) sends its entire routing table (which lists all the other hosts it knows about) to its closest neighbor host every 30 seconds. The neighbor host in turn will pass the information on to its next neighbor and so on until all hosts within the network have the same knowledge of routing paths, a state known as network convergence. RIP uses a hop count as a way to determine network distance. (Other protocols use more sophisticated algorithms that include timing as well.) Each host with a router in the network uses the routing table information to determine the next host to route a packet to for a specified destination.

RIP is considered an effective solution for small homogeneous networks. For larger, more complicated networks, RIP's transmission of the entire routing table every 30 seconds may put a heavy amount of extra traffic in the network.

The major alternative to RIP is the Open Shortest Path First Protocol (OSPF).

Basic Network Testing Tools

ipconfig – Quickly Find Your IP Address
You can find your IP address from the Control Panel, but this takes quite a few clicks. The ipconfig command is a fast way of determining your computer’s IP address and other information, such as the address of its default gateway — useful if you want to know the IP address of your router’s web interface.
To use the command, just type ipconfig into a Command Prompt window. You’ll see a list of all the network connections your computer is using. Look under Wireless LAN adapter if you’re connected to Wi-Fi or Ethernet adapter Local Area Connection if you’re connected to a wired network.



Computer Architecture - BSc CSIT 3rd Semester Questions

Download the following files:






Quadric Surface

Fig:sphere



Fig: ellipsoid



Fig: elliptic paraboloid




Fig: hyperbolic paraboloid



Fig: elliptic cone



Fig: hyperboloid of one sheet



Fig: hyperboloid of two sheet