Consider that we have a microprocessor interfaced to both I/O device and also a memory chip. Now how to select between the two devices according to the requirement?
For this purpose an address decoding circuit is used. An address decoding circuit aids in selecting the required I/O device or a memory chip.
Let us discuss the concept of Memory interfacing and I/O interfacing here:
The processor communicates with all the parts interconnected in the system through a common address and data bus. As a result of this, only one device can transmit data at a time and others can only receive that data. If more than one device attempt to send data through the bus at the same time, the proper communication among the devices does not become possible because the data sent by them gets garbled. To avoid this situation, ensuring that the proper device gets addressed at proper time, the technique called "address decoding" is used. Generally, there are two common methods for mapping address of these devices. They are:
I/O Mapped I/O
It can address 2^8=256 bytes if mapped in I/O mode. They are used to read 8-bit data from or write 8-bit data to selected device. In this, the I/O device is addressed with 8-bit address.
Memory Mapped I/O
In this mode, the I/O devices are addressed with 16-bit address. The total addressing capability of the processor 8085 in this mode is 2^16 = 65536 bytes = 64 KB.
In both modes described above, depending on the addresses that are allocated to the device, the address decoding are categorized in the following two groups:
Unique Address Decoding
If all of the address lines available on that mapping mode are used for address decoding, then that decoding is called unique address decoding.
Non-unique Address Decoding
If all of the address lines available on that mapping mode are not used for address decoding, then that decoding is called unique address decoding.
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