Programmable Interrupt Controller :: The 8259A

The 8259A is a programmable interrupt-managing device, specifically designed for use with the interrupt signals (INTR/INT) of the 8085 MP.

The 8259A block diagram includes control logic, registers for interrupt requests, priority resolver, cascade logic, and data bus. The registers manage interrupt requests; the priority resolver determines their priority. The cascade logic is used to connect additional 8259A devices.

Fig: Block Diagram of 8259A PIC

The following steps take place during the operation of 8259A: 
  • One or more interrupt request lines go high requesting the service.
  • The 8259A resolves the priorities and sends an INT signal to the MP. 
  • The MP acknowledges the interrupt by sending INTA(bar).
  • After the INTA(bar) has been received, the op-code for the call instruction (CDH) is placed on the data bus.
  • Because of the CALL instruction, the MP sends two more INTA(bar) signals.
  • At the first INTA(bar), the 8259A places the low-order 8-bit address on the data bus and at the second INTA(bar), it places the high-order 8-bit address of the interrupt vector. This completes the 3-byte CALL instruction.
  • The program sequence of the MP is transferred to the memory location specified by the CALL instruction. 
Priority modes
1. Fully Nested mode
  • IR0 has the highest priority and the following IR1, IR2, IR3…… etc. have the decreasing priorities.
2. Automatic rotation mode
  • First priority changes to the last after its service.
3. Specific rotation mode
  • This is user selectable or programmable, which means priority can be selected by programming.

Features
  1. It manages 8 interrupt requests.
  2. It can vector an interrupt request anywhere in the memory map through program control without additional hardware for restart instructions. However, all 8 requests are spaced at the interval of either 4 locations or 8 locations.
  3. It can solve 8 levels of interrupt priorities in a variety of modes.
  4. With cascading additional 8259A devices, the priority scheme can be expanded to 64 levels.
  5. The 8259A has the abilities such as reading the status and changing the interrupt mode during a program execution.
  6. It can mask each interrupt request individually.
  7. It can be set up to work with either the 8085 MP mode or the 8086/8088 MP mode.

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